Home > 通知公告 > 恭喜黄巍宏同学在一区期刊Nanoscale上发表封面文章

近期,本课题组张敏老师和黄巍宏同学分别以通讯作者和第一作者在纳米材料领域知名期刊Nanoscale上发表了题为“Ultra-high drivability, high-mobility, low-voltage and high-integration intrinsically stretchable transistors”的研究成果。

针对本征可拉伸晶体管的制备与光刻平台不兼容的问题,本文提出了一种可移除转移光刻法,实现了性能优异的本征可拉伸晶体管,能够在-1V的低工作电压下达到810μAmm−1的高电流密度以及221 cm2V−1s−1的高迁移率,具有大规模集成潜力。该成果发表在纳米科学与技术方向重要国际期刊Nanoscale。

Realizing intrinsically stretchable transistors with high current drivability, high mobility, small feature size, low power and the potential for mass production is essential for advancing stretchable electronics a critical step forward. However, it is challenging to realize these requirements simultaneously due to the limitations of the existing fabrication technologies when integrating intrinsically stretchable materials into transistors. Here, we propose a removal-transfer-photolithography method (RTPM), combined with adopting poly(urea-urethane) (PUU) as a dielectric, to realize integratable intrinsically stretchable carbon nanotube thin-film transistors (IIS-CNT-TFTs). The realized IIS-CNT-TFTs achieve excellent electrical and mechanical properties simultaneously, showing high field-effect-mobility up to 221 cm2V1s1and high current density up to 810 μA mm1at a low driving voltage of −1 V, which are both the highest values for intrinsically stretchable transistors today to the best of our knowledge. At the same time, the transistors can survive 2000 cycles of repeated stretching by 50%, indicating their promising applicability to stretchable circuits, displays, and wearable electronics. The achieved intrinsically stretchable thin-film transistors show higher electrical performance, higher stretching durability, and smaller feature size simultaneously compared with the state-of-the-art works, providing a novel solution to integratable intrinsically stretchable electronics. Besides, the proposed RTPM involves adopting removable sacrificial layers to protect the PDMS substrate and PUU dielectric during the photolithography and patterning steps, and finally removing the sacrificial layers to improve the electrical and mechanical performance. This method is generally applicable to further enhance the performance of the existing transistors and devices with a similar structure in soft electronics.